Computer Organization | Instruction Formats (Zero, One, Two and Three Address Instruction)

The manner that instructions are encoded and represented in machine language is referred to as an instruction format in computer organization. Zero, one, two, and three-address instructions are among the various formats for instructions.
The benefits and drawbacks of any kind of instruction format vary depending on the code size, execution time, and flexibility. Combining these formats allows modern computer architectures to strike a compromise between power and simplicity.

What are the Different Types of Filed in Instruction?

A computer follows instructions to carry out a task. Computer instruction is divided into groupings known as fields.
For computers, these fields hold distinct information. Since everything is between 0 and 1, a CPU determines what to do based on the relevance of each field.
The most typical domains are:

The operation to be carried out, such as addition, is specified in the operation field.
The address field holds the operand's location, which could be in the register or memory.
The mode field denotes the operand's foundation.

The length of an instruction varies according on how many addresses it contains. Based on the quantity of address fields, CPU organization typically falls into one of three categories:

Single Accumulator organization
General register organization
Stack organization

The operation in the first organization uses a unique register known as the accumulator.
In the second, calculation is done using numerous registers.
The third organization does not have an address field because they operate on a stack basis. It is not necessary to use just one organization; instead, a combination of different organizations is typically observed.

Types of Instructions

Based on the number of addresses, instructions are classified as:

NOTE: We will use the X = (A+B)*(C+D) expression to showcase the procedure.

Zero Address Instructions

There are no operands or addresses specified in these instructions.
Rather, they work with data that is implicitly defined by the command and stored in registers or memory locations.
A zero-address instruction, for instance, can just combine the contents of two registers without naming them.

Zero, One, Two and Three Address Instruction

A computer that uses stacks does not make use of the instruction's address field.
An expression is first translated to reverse Polish notation, or postfix notation, in order to be evaluated.

Expression: X = (A+B)*(C+D)

Postfixed : X = AB+CD+*

TOP means top of stack

M[X] is any memory location

PUSH	A	TOP = A
PUSH	B	TOP = B
ADD		TOP = A+B
PUSH	C	TOP = C
PUSH	D	TOP = D
ADD		TOP = C+D
MUL		*TOP = (C+D)(A+B)**
POP	X	M[X] = TOP

One Address Instructions

One operand, or address, is specified by these instructions; an address is usually a memory location or register.
The operand's contents are altered by the instruction, and the outcome could be saved in the same place or somewhere else.
A register could be loaded with data from a memory location by means of a one-address instruction, for instance.

One Address Instruction

This manipulates data by using an implicit ACCUMULATOR register.
The accumulator has one operand, while the register or memory location contains the other.
Implied indicates that there is no need to specify because the CPU already knows that there is one operand in the accumulator.

Expression: X = (A+B)*(C+D)

AC is accumulator

M[] is any memory location

M[T] is temporary location

LOAD	A	AC = M[A]
ADD	B	AC = AC + M[B]
STORE	T	M[T] = AC
LOAD	C	AC = M[C]
ADD	D	AC = AC + M[D]
MUL	T	AC = AC * M[T]
STORE	X	M[X] = AC

Two Address Instructions

Two operands, or addresses, which could be registers or locations in memory, are specified by these instructions.
Both operands' contents are affected by the instruction, and the outcome could be saved in the same place or somewhere else.
A two-address instruction, for instance, might combine the contents of two registers and store the outcome in one of the registers.
This is typical of business PCs. The instruction here allows for the specification of two addresses.
In contrast to the previous one address instruction, where the result was saved in the accumulator, in this one the result can be placed elsewhere in addition to accumulators, but it will take more bits to represent the address.

Two Address Instruction

Here destination address can also contain an operand.

Expression: X = (A+B)*(C+D)

R1, R2 are registers

M[] is any memory location

MOV	R1, A	R1 = M[A]
ADD	R1, B	R1 = R1 + M[B]
MOV	R2, C	R2 = M[C]
ADD	R2, D	R2 = R2 + M[D]
MUL	R1, R2	*R1 = R1 R2**
MOV	X, R1	M[X] = R1

Three Address Instructions

Three operands, or addresses, which could be registers or locations in memory, are specified by these instructions.
All three operands' contents are affected by the instruction, and the outcome could be saved in the same place or somewhere else.
An instruction with three addresses, for instance, could multiply the values in two registers and add the values in a third register, saving the outcome in a fourth register.
Three address fields are provided here for indicating a register or memory location.
Although the size of the programs is substantially smaller, there are more bits per instruction.
These instructions greatly simplify the process of creating programs, but they do not result in a significant increase in program speed.
Instead, instructions now simply carry more information, and each micro-operation—such as altering a register's contents or loading an address into the address bus—will be completed in a single cycle.

Three Address Instruction

Expression: X = (A+B)*(C+D)
R1, R2 are registers
M[] is any memory location

ADD	R1, A, B	R1 = M[A] + M[B]
ADD	R2, C, D	R2 = M[C] + M[D]
MUL	X, R1, R2	*M[X] = R1 R2**

Advantages of Zero-Address, One-Address, Two-Address and Three-Address Instructions

Zero-address instruction

Since they don't need operand fetching or addressing, they are easy to use and fast to execute. Additionally, they require less memory.

Single-address instruction

They are more adaptable than zero-address instructions because they support a greater variety of addressing modes.
Additionally, they take up less memory than instructions with two or three addresses.

Two-address instruction

Since two operands can be handled in a single instruction, they enable more complicated operations and have the potential to be more efficient than one-address instructions.
Additionally, they support a large variety of addressing options.

Three-address instruction

Because they can handle three operands in a single instruction, they enable even more complicated operations and may even be more efficient than two-address instructions.
Additionally, they support a large variety of addressing options.