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• IMED Third Terminal Exam (2020-2021).
• Cloud Computing Final Quiz (2020-2021).
• Industrial Management And Entrepreneurship Development.

General Register Organization

General Register Organization

• During multiplication, memory spaces are required for storing pointers, counters, return addresses, temporary results, and partial products.
• Because memory access is the most time-consuming activity in a computer, having to refer to memory locations for such applications is time-consuming.
• Keeping these intermediate values in CPU registers is more convenient and efficient.
• When the CPU contains a high number of registers, it is most economical to connect them via a common bus system. 
• Not just for direct data transfers, but also for conducting different micro operations, the registers connect with one another.

General Register Organization

• As a result, a single unit must be provided that can do all of the processor's arithmetic, logic, and shift micro operations.
• Above fig. depicts the bus structure for seven CPU registers. To construct the two buses A and B, the output of each register is linked to two multiplexers (MUX). Each multiplexer's selection lines choose one register or the input data for that bus.
• The inputs to a shared arithmetic logic unit are formed by the A and B buses (ALU).
• The arithmetic or logic micro-operation to be executed is determined by the operation selected in the ALU.
• The micro operation's result is accessible for output data and also goes into all of the registers' inputs.
• A decoder selects the register that gets information from the output bus.
• The decoder activates one of the register fill inputs, creating a connection between the data on the output bus and the destination register's inputs.

Register set with common ALU

Central Processing Unit

Central Processing Unit - Introduction

• The central processing unit, often known as the CPU, is the component of the computer that handles the majority of data processing.
• As shown in figure the CPU is made up of three primary components. The register set is used to hold intermediate data that is needed during the execution of instructions. 
• The arithmetic logic unit (ALU) executes the instructions by performing the appropriate micro operations. The control unit controls information transmission between registers and tells the ALU which operation to conduct.
• The CPU is in charge of a variety of tasks that are controlled by computer instructions.
• Computer architecture refers to the structure and behavior of a computer as seen by a programmer using machine language instructions.

Major components of CPU

• This includes instruction formats, addressing modes, the instruction set, and the overall organization of the CPU registers.
• One barrier where the computer designer and the computer programmer see the same machine is the portion of the CPU connected with the instruction set.

Computer Architecture and Hardware Maintenance

CAHM

 1. Hardware Organization of computer system

1.1 CPU organization.

• General register organization.
• Stack organization.
•  Instruction formats(three address, two address, one address, zero address and RISC instruction).
• Addressing modes: Immediate, register, direct, in direct, relative, indexed.

1.2 CPU Design: 

• Micro-programmed vs hard wired control.
• Reduced instruction set computers: CISC characteristics, RISC characteristics, and their comparison.

2. Memory organization

2.1 Memory Hierarchy

• RAM and ROM chips.
• Memory address map.
• Memory connections to CPU.
• Auxiliary memory: Magnetic disks and magnetic tapes.
• Associative memory.
• Cache memory.
• Virtual memory.
• Memory management hardware.
• Read and Write operation

3. Arithmetic Operations

3.1 Introduction.

• Addition.
• Subtraction.
• Half Adder and Full Adder.
• Multiplication and Division algorithm.

4. I/O Organization

4.1 Basis Input output system(BIOS)

• Function of BIOS.
• Testing and initialization.
• Configuring the system.

4.2 Modes of Data Transfer

• Programmed I/O : Synchronous, asynchronous and interrupt initiated.
• DMA data transfer

5. 8085 Microprocessor 

5.1 Introduction.

• Architecture.
• Pin diagram.
• Comparison with 8086.

6. Architecture of multi processor systems

6.1 Forms of parallel processing.

• Parallel processing and pipelines.
• Basic characteristics of multiprocessor.
• General purpose multiprocessors.

6.2 Interconnection networks.

• Pipelining.
• Time shared common bus.
• Multi port memory.
• Cross bar switch.
• Multi stage switching networks and hyper cube structures.